The present disclosure relates to testing of computerized systems, in general, and to post-silicon testing of multi-core computerized systems, in particular.
Computerized devices control almost every aspect of our life—from writing documents to controlling traffic lights. However, computerized devices are bug-prone, and thus require a testing phase in which the bugs should be discovered. The testing phase is considered one of the most difficult tasks in designing a computerized device. The cost of a bug may be enormous, as its consequences may be disastrous. For example, a bug may cause the injury of a person relying on the designated behavior of the computerized device. Additionally, a bug in hardware or firmware may be expensive to fix, as patching it requires call-back of the computerized device. Hence, many developers of computerized devices invest a significant portion, such as 70%, of the development cycle to discover erroneous behaviors of the computerized device.
Some of the testing of a target computerized system is performed in a pre-silicon stage, in which the target computerized system is described using a descriptive language, such as for example Verilog or VHDL. The target computerized system may be a processor, a microprocessor, an electronic circuit, an integrated circuit, a chipset, a computerized device comprising a processor or the like. During the pre-silicon phase, a test template may be designed to enable testing of the target computerized system. The test template may be designed to a single-core configuration of the target computerized system. The test template may define one or more tests and may be executed multiple number of times, each time inducing a different execution, such as by having different input values. An exemplary test template may be “two floating point instructions and then three memory stores” which defines several different tests, each utilizing specific commands that correlate to those defined by the test template. In some cases, a test template may correlate to a single test.
Some of the testing of the target computerized system is performed in a post-silicon stage. The post-silicon stage is after the target computerized system is produced in accordance with the description provided by the descriptive language, also referred to as a circuit or silicon. It will be noted that the circuit may be different than the target computerized system, such as for example comprising only a chip without a casing, being assembled manually, being assembled partially and the like.
During the post-silicon stage the circuit may be tested using a test that is configured to be executed by the circuit. The test may be configured to a multi-core configuration or a single-core configuration of the target computerized system. In case the circuit is a multi-core circuit comprising of more than a single core, executing a test configured to a single-core configuration may be inefficient as the circuit may only execute one such test at a time, utilizing a single core without making any use of the rest of the cores of the circuit. Alternatively, executing one or more tests on a multi-core circuit may provide erroneous results if a portion of the one or more tests is configured to a single-core configuration. The portion of the one or more tests may access shared resources in an unprotected manner or an unsynchronized manner. It will be noted that a test may be determined based on a test template. The test template may be configured to define tests which are configured to a multi-core configuration, a single-core configuration or both.